This is the question set along with answers of Digital System Spring 2017 Pokhara University, which was taken by Pokhara University.

**POKHARA UNIVERSITY – Digital System Spring 2017**

Level: Bachelor Semester: Spring Year:2017

Program: BBA/BBA-BI/BCIS/BHCM/BBA-TT Full Marks: 100

Course: Digital System Pass Marks: 45

Time: 3 hrs

**Section “A”**

Very Short Answer Questions

- Why are digital systems popular? How do they differ from analog systems?
- Express the decimal number -127 in 1’s complement form and 2’s complement form.
- What weight does 3 have in a decimal number (12345) 10?
- Name two universal gates. Why are they called universal gates?
- State and verify De Morgan’s Theorem for three variables.
- How is ROM different from RAM?
- Write down the excitation table and characteristics equation of T flip- flop.
- What do you understand by the modulus of a counter? How many flipflops are required to design the MOD 66 counter?
- Draw the block diagram of ALU?
- How many selection lines are required for a multiplexer to select 45 inputs?

**Section “B”**

Attempt **any six** questions

11. Realize the following function using required NAND or NOR gates. F(a, b, c, d) = ∑ (0, 1, 2,3,7,8,9,10,11,15)

12. Write down four fundamental differences between Combinational Circuits and Sequential Circuits? State the steps to design a full adder circuit and explain.

13. Simplify the given Boolean function with don’t care conditions (W, X, Y, Z) = ∑ (0, 2, 7, 8, 10) + ∑d (1,11,14, 15) and represent the simplified function in Product of Sum and Sum of Product. Also, find out the complement of the functions derived.

14. Implement the Boolean expression F(A, B, C, D) = ∑(0,2,3,4,7,8,9,10,11,14,15) using multiplexer circuit.

15. Where are shift registers applied? Design four-bit serial in serial out (SISO) shift register using D flip-flop.

16. Design 3-bit synchronous grey code binary counter using JK flip-flops stating detail procedures.

17. Design a combinational circuit that takes 8 4 2 1 code as an input and provides an output in 8-4 -2-1 code.

**Section “C”**

**Case Analysis**

Reduce the number of states in the following state table and tabulate the reduced state table.

Present State | New State | Output | ||

X=0 | X=1 | X=0 | X=1 | |

A | F | B | 0 | 0 |

B | D | C | 0 | 0 |

C | F | E | 0 | 0 |

D | G | A | 1 | 0 |

E | D | C | 0 | 0 |

F | F | B | 1 | 1 |

G | G | H | 0 | 1 |

H | G | A | 1 | 0 |

From the reduced state diagram in question 18, draw the logical diagram using the required logical gates and required JK flipflops.

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