{"id":26,"date":"2019-01-11T08:48:58","date_gmt":"2019-01-11T08:48:58","guid":{"rendered":"https:\/\/bcisnotes.com\/thirdsemester\/?p=26"},"modified":"2020-03-02T08:03:10","modified_gmt":"2020-03-02T08:03:10","slug":"intel-8085-microprocessor-architecture-and-programming","status":"publish","type":"post","link":"https:\/\/bcisnotes.com\/thirdsemester\/computer-architecture-and-microprocessor\/intel-8085-microprocessor-architecture-and-programming\/","title":{"rendered":"INTEL 8085 MICROPROCESSOR ARCHITECTURE AND PROGRAMMING || Microprocessor|| Bcis Notes"},"content":{"rendered":"<h2>ARCHITECTURE BLOCK DIAGRAM\u00a0OF 8085 MICROPROCESSOR<\/h2>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-1380 size-full\" src=\"https:\/\/bcisnotes.com\/thirdsemester\/wp-content\/uploads\/2019\/01\/8085_architeccher.png\" alt=\"ARCHITECTURE BLOCK DIAGRAM\u00a0OF 8085 MICROPROCESSOR\" width=\"677\" height=\"488\" srcset=\"https:\/\/bcisnotes.com\/thirdsemester\/wp-content\/uploads\/2019\/01\/8085_architeccher.png 677w, https:\/\/bcisnotes.com\/thirdsemester\/wp-content\/uploads\/2019\/01\/8085_architeccher-300x216.png 300w\" sizes=\"(max-width: 677px) 100vw, 677px\" \/><\/p>\n<p>8085 is pronounced as an &#8220;eighty-eighty-five&#8221; microprocessor. It is an 8-bit microprocessor designed by Intel in 1977 using NMOS technology.<\/p>\n<p>It has the following configuration \u2212<\/p>\n<ul>\n<li>8-bit data bus<\/li>\n<li>16-bit address bus, which can address up to 64KB<\/li>\n<li>A 16-bit program counter<\/li>\n<li>A 16-bit stack pointer<\/li>\n<li>Six 8-bit registers arranged in pairs: BC, DE, HL<\/li>\n<li>Requires +5V supply to operate at 3.2 MHZ single-phase clock<\/li>\n<\/ul>\n<p>It is used in washing machines, microwave ovens, mobile phones, etc.<\/p>\n<h3>8085 Microprocessor \u2013 Functional Units<\/h3>\n<p>8085 consists of the following functional units \u2013<\/p>\n<ul>\n<li><strong>Accumulator<\/strong>:- It is an 8-bit register used to perform arithmetic, logical, I\/O &amp; LOAD\/STORE operations. It is connected to the internal data bus &amp; ALU.<\/li>\n<li><strong>Arithmetic and logic unit<\/strong>:- As the name suggests, it performs arithmetic and logical operations like Addition, Subtraction, AND, OR, etc. on 8-bit data.<\/li>\n<li><strong>General-purpose register<\/strong>:- There are 6 general-purpose registers in 8085 processor, i.e. B, C, D, E, H &amp; L. Each register can hold 8-bit data. These registers can work in pairs to hold 16-bit data and their pairing combination is like B-C, D-E &amp; H-L.<\/li>\n<li><strong>Program counter<\/strong>:- It is a 16-bit register used to store the memory address location of the next instruction to be executed. Microprocessor increments the program whenever an instruction is being executed so that the program counterpoints to the memory address of the next instruction that is going to be executed.<\/li>\n<li><strong>Stack pointer<\/strong>:- It is also a 16-bit register that works like a stack, which is always incremented\/decremented by 2 during push &amp; pop operations.<\/li>\n<li><strong>Temporary register<\/strong>:- It is an 8-bit register, which holds the temporary data of arithmetic and logical operations.<\/li>\n<li><strong>Flag register<\/strong>:- It is an 8-bit register having five 1-bit flip-flops, which holds either 0 or 1 depending upon the result stored in the accumulator.<\/li>\n<\/ul>\n<p>These are the set of 5 flip-flops \u2212<\/p>\n<ul>\n<li>Sign (S)<\/li>\n<li>Zero (Z)<\/li>\n<li>Auxiliary Carry (AC)<\/li>\n<li>Parity (P)<\/li>\n<li>Carry (C)<\/li>\n<\/ul>\n<p>Its bit position is shown in the following table:-<\/p>\n<table style=\"height: 105px;\" width=\"457\">\n<tbody>\n<tr>\n<td>D7<\/td>\n<td>D6<\/td>\n<td>D5<\/td>\n<td>D4<\/td>\n<td>D3<\/td>\n<td>D2<\/td>\n<td>D1<\/td>\n<td>D0<\/td>\n<\/tr>\n<tr>\n<td>S<\/td>\n<td>Z<\/td>\n<td><\/td>\n<td>AC<\/td>\n<td><\/td>\n<td>P<\/td>\n<td><\/td>\n<td>CY<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>The bit position of the flip flop in flag register is above;<br \/>\n1. Sign(S)- If D7 of the result is 1 then sign flag is set otherwise reset. As we know that a number on the D7 always decides the sign of the number.<br \/>\nif D7 is 1: the number is negative.<br \/>\nif D7 is 0: the number is positive.<\/p>\n<p>2. Zeros (Z)-If the result stored in an accumulator is zero then this flip flop is set otherwise it is reset.<\/p>\n<p>3. Auxiliary carry (AC)-If any carry goes from D3 to D4 in the output then it is set otherwise it is reset.<\/p>\n<p>4. Parity (P)-If the no of 1&#8217;s is even in the output stored in the accumulator then it is set otherwise it is reset for the odd.<\/p>\n<p>5. Carry(C)-If the result stored in an accumulator generates a carry in its final output then it is set otherwise it is reset. The carry flag also serves as a borrow flag for subtraction<\/p>\n<ul>\n<li><strong>Instruction register and decoder<\/strong><\/li>\n<\/ul>\n<p>It is an 8-bit register. When an instruction is fetched from memory then it is stored in the Instruction register. Instruction decoder decodes the information present in the Instruction register.<\/p>\n<ul>\n<li><strong>Timing and control unit<\/strong><\/li>\n<\/ul>\n<p>It provides timing and control signals to the microprocessor to perform operations. Following are the timing and control signals, which control external and internal circuits \u2212<\/p>\n<ol>\n<li>Control Signals: READY, RD\u2019, WR\u2019, ALE<\/li>\n<li>Status Signals: S0, S1, IO\/M\u2019<\/li>\n<li>DMA Signals: HOLD, HLDA<\/li>\n<li>RESET Signals: RESET IN, RESET OUT<\/li>\n<\/ol>\n<ul>\n<li><strong>Interrupt control<\/strong><\/li>\n<\/ul>\n<p>As the name suggests it controls the interrupts during a process. When a microprocessor is executing the main program and whenever an interrupt occurs, the microprocessor shifts the control from the main program to process the incoming request. After the request is completed, the control goes back to the main program.<\/p>\n<p>There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST 6.5, RST 5.5, TRAP.<\/p>\n<ul>\n<li><strong>Serial Input\/output control<\/strong><\/li>\n<\/ul>\n<p>It controls the serial data communication by using these two instructions: SID (Serial input data) and SOD (Serial output data).<\/p>\n<ul>\n<li><strong>Address buffer and address-data buffer<\/strong><\/li>\n<\/ul>\n<p>The content stored in the stack pointer and program counter is loaded into the address buffer and address-data buffer to communicate with the CPU. The memory and I\/O chips are connected to these buses; the CPU can exchange the desired data with the memory and I\/O chips.<\/p>\n<ul>\n<li><strong>Address bus and data bus<\/strong><\/li>\n<\/ul>\n<p>The data bus carries the data to be stored. It is bidirectional, whereas the address bus carries the location to where it should be stored and it is unidirectional. It is used to transfer the data &amp; Address I\/O devices.<\/p>\n<h3><strong>FEATURES OF 8085 MICROPROCESSOR:-\u00a0<\/strong><\/h3>\n<ul>\n<li>Intel 8085 is an 8-bit, N-channel Metal Oxide Semiconductor (NMOS) microprocessor<\/li>\n<li>It is a 40 pin IC package fabricated on a single Large Scale Integration (LSI) chip<\/li>\n<li>The Intel 8085 uses a single +5V DC supply for its operation<\/li>\n<li>Its clock speed is about 3MHz<\/li>\n<li>It provides 16 address lines so it can access 2^16 = 64 KB of \u00a0\u00a0memory<\/li>\n<li>Accumulator based<\/li>\n<li>It has 80 basic instructions, 246 op-codes, and 5 addressing modes.<\/li>\n<li>It contains 6200 transistors approx.<\/li>\n<li>Its dimensions are 164mm x 222 mm<\/li>\n<\/ul>\n<h3><strong>INSTRUCTIONS AND DATA FORMAT OF 8085 MICROPROCESSOR <\/strong><\/h3>\n<p>A microcomputer performs a task by reading and executing the set of instructions written in its memory. This set of instructions, written in a sequence is called P<strong>rogram.<\/strong><\/p>\n<p>It is a <strong>group of bits<\/strong> that instruct the computer to perform a specific operation.<\/p>\n<p>An\u00a0<strong>instruction<\/strong> is a command to the microprocessor to perform a given task on a specified date.<\/p>\n<p>Each instruction has two parts: one is the task to be performed, called the operation code (op-code), and the second is the data to be operated on, called the <strong>operand.<\/strong><\/p>\n<p>8085 has <strong>80 basic instructions, 246 op-codes.<\/strong><\/p>\n<table style=\"height: 20px;\" width=\"461\">\n<tbody>\n<tr>\n<td width=\"174\"><strong>Opcode <\/strong><\/td>\n<td width=\"276\"><strong>Address\/operands<\/strong><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><strong style=\"text-align: center;\">\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 Fig: Instructions format<\/strong><\/p>\n<p><strong>Op Code<\/strong><strong>= <\/strong>Operation to be performed<\/p>\n<p><strong>Address<\/strong><strong> = <\/strong>address of operand on memory<\/p>\n<p><strong>Eg:\u00a0 A + B <\/strong><\/p>\n<p><strong> Operands = A B<\/strong><\/p>\n<p><strong>Opcode = +<\/strong><\/p>\n<p><strong><u>TYPES OF INSTRUCTION FORMATS<\/u><\/strong><\/p>\n<p>The 8085A instruction set consists of one, two and three-byte instructions. The first byte is always the opcode; in two-byte instructions, the second byte is usually data; in three-byte instructions the last two bytes present address or 16-bit data.<\/p>\n<ol>\n<li><strong>One Byte Instruction Formats:<\/strong><\/li>\n<\/ol>\n<ul>\n<li>Generally, the op-code &amp; operand are 8-bit or 1 byte.<\/li>\n<li>Specifies the operation which has to be performed or who going to do that operation.<\/li>\n<li>Generally, only one byte of a memory location is required.<\/li>\n<li>Format: <strong>Op-code, <\/strong>In this only op-code is present<\/li>\n<\/ul>\n<p><strong>Eg: MOV B,\u00a0 C;\u00a0 Move Data; copy the content of C register to B register without modifying the content of the source register.<\/strong><\/p>\n<ol start=\"2\">\n<li><strong> Two Byte Instruction Formats:<\/strong><\/li>\n<\/ol>\n<ul>\n<li>The first byte of two-byte instruction specifies the operation or opcode.<\/li>\n<\/ul>\n<p>1 byte \u2013 Op-Code<\/p>\n<ul>\n<li>The second byte of the instruction specifies the operand or data.<\/li>\n<\/ul>\n<p>2 byte \u2013 Operand<\/p>\n<ul>\n<li>Format :<\/li>\n<\/ul>\n<table>\n<tbody>\n<tr>\n<td width=\"108\"><strong>Opcode<\/strong><\/td>\n<td width=\"150\"><strong>Operands<\/strong><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><strong>Eg: MVI B, 80H; MVI means immediate data. 57H is an immediate data and it is to be copied in the B register<\/strong><\/p>\n<p><strong>3.Three Byte Instruction Format:<\/strong><\/p>\n<ul>\n<li>The first byte specifies the op-code or operation<\/li>\n<li>The second and third byte of three-byte of the instruction specifies the operand.<\/li>\n<li>Generally, it used a 16-bit or 16-bit memory address location.<\/li>\n<li>II byte store the lower order 8 \u2013bit of 16-bit operand.<\/li>\n<li>III byte store higher-order 8-bit of 16-bit operand.<\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<table>\n<tbody>\n<tr>\n<td width=\"42\"><\/td>\n<td width=\"36\"><\/td>\n<td width=\"192\"><\/td>\n<td width=\"42\"><\/td>\n<td width=\"186\"><\/td>\n<td width=\"54\"><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>D15, D14 &#8211;\u00a0\u00a0 &#8211;\u00a0\u00a0 &#8211;\u00a0\u00a0\u00a0 &#8211;\u00a0\u00a0\u00a0\u00a0\u00a0 &#8211;\u00a0\u00a0\u00a0\u00a0 &#8211;\u00a0\u00a0 D8 D7,\u00a0 D6 &#8211;\u00a0 &#8211;\u00a0 &#8211;\u00a0 &#8211;\u00a0\u00a0\u00a0 &#8211;\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 &#8211;\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 D0<\/p>\n<p>Higher order 8-bit\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Lower order 8 &#8211; bit<\/p>\n<p>&nbsp;<\/p>\n<ul>\n<li>Format :<\/li>\n<\/ul>\n<table>\n<tbody>\n<tr>\n<td width=\"90\">Opcode<\/td>\n<td width=\"102\">Operand<\/td>\n<td width=\"102\">Operand<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<ul>\n<li>Eg <strong>STA ,\u00a0 5600H, ST = Store, A= Accumulator, 5600H = memory location<\/strong><\/li>\n<\/ul>\n<p><strong>Computer Instruction<\/strong><strong>: <\/strong>It is a sequence of <strong>binary bits <\/strong>that tells the computer to do some specific task.<\/p>\n<ul>\n<li>An instruction usually consists of <strong>Operation code <\/strong>and<\/li>\n<li>Sometimes instruction just consists of operation code (Opcode)<\/li>\n<li>All of the Opcodes and operands are <strong>binary codes<\/strong>.<\/li>\n<li>Computer instructions (<strong>Opcode <\/strong>and <strong>operands<\/strong>) are normally stored in a consecutive memory location (<strong>g. RAM<\/strong>) and executed sequentially one at a time.<\/li>\n<\/ul>\n<p>The control reads an instruction from a specific address in memory and executes it. It then continues by reading the next instruction in sequence and execute<\/p>\n<p>Eg:\u00a0 <strong>LD A, 01H<\/strong><\/p>\n<p>Here,<\/p>\n<p><strong>LD<\/strong> stands for Load<\/p>\n<p><strong>A<\/strong> stand for Accumulator<\/p>\n<p><strong>01<\/strong> is Data (operands)&amp;<\/p>\n<p><strong>H<\/strong> means Data is in Hexadecimal<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-1381 size-full\" src=\"https:\/\/bcisnotes.com\/thirdsemester\/wp-content\/uploads\/2019\/01\/370px-ABasicComputer.gif\" alt=\"INTEL 8085 MICROPROCESSOR ARCHITECTURE AND PROGRAMMING || Microprocessor|| Bcis Notes\" width=\"370\" height=\"285\" \/><\/p>\n<p style=\"text-align: center;\">Fig: How operation is performed inside the Processor.<\/p>\n<p><strong>Addressing Modes of 8085:-<\/strong><\/p>\n<p>Addressing mode is the way in which operand of the instruction is specified.<\/p>\n<p>The way the operands are chosen during execution.<\/p>\n<p><strong>Types of addressing modes:-<\/strong><u><br \/>\n<\/u>In 8085 microprocessor there are 5 types of addressing modes:<\/p>\n<ol>\n<li><strong>Immediate Addressing Mode:-\u00a0<\/strong>In immediate addressing mode, the source operand is always data. If the data is 8-bit, then the instruction will be of 2 bytes, if the data is of 16-bit then the instruction will be of 3 bytes.<\/li>\n<\/ol>\n<p><strong>Examples:<\/strong><br \/>\nMVI B 45 (move the data 45H immediately to register B)<br \/>\nLXI H 3050 (load the H-L pair with the operand 3050H immediately)<br \/>\nJMP address (jump to the operand address immediately)<\/p>\n<ol start=\"2\">\n<li><strong>Register Addressing Mode:-\u00a0<\/strong>In register addressing mode, the data to be operated is available inside the register(s) and register(s) is(are) operands. Therefore the operation is performed within various registers of the microprocessor.<\/li>\n<\/ol>\n<p><strong>Examples:<\/strong><br \/>\nMOV A, B (move the contents of register B to register A)<br \/>\nADD B (add contents of registers A and B and store the result in register A)<br \/>\nINR A (increment the contents of register A by one)<\/p>\n<ol start=\"3\">\n<li><strong>Direct Addressing Mode:-<\/strong> Indirect addressing mode, the data to be operated is available inside a memory location and that memory location is directly specified as an operand. The operand is directly available in the instruction itself.<\/li>\n<\/ol>\n<p><strong>Examples:<\/strong><br \/>\nLDA 2050 (load the contents of a memory location into accumulator A)<br \/>\nLHLD address (load contents of a 16-bit memory location into H-L register pair)<br \/>\nIN 35 (read the data from port whose address is 01)<\/p>\n<ol start=\"4\">\n<li><strong>Register Indirect Addressing Mode:- <\/strong>In register indirect addressing mode, the data to be operated is available inside a memory location and that memory location is indirectly specified b a register pair.<\/li>\n<\/ol>\n<p><strong>Examples:<\/strong><br \/>\nMOV A, M (move the contents of the memory location pointed by the H-L pair to the accumulator)<br \/>\nLDAX B (move contains B-C register to the accumulator)<br \/>\nLXIH 9570 (load immediate the H-L pair with the address of the location 9570)<\/p>\n<ol start=\"5\">\n<li><strong>Implied\/Implicit Addressing Mode:-\u00a0<\/strong>In implied\/implicit addressing mode the operand is hidden and the data to be operated is available in the instruction itself.<\/li>\n<\/ol>\n<p><strong>Examples:<\/strong><br \/>\nCMA (finds and stores the 1\u2019s complement of the contains accumulator A in A)<br \/>\nRRC (rotate accumulator A right by one bit)<br \/>\nRLC (rotate accumulator A left by one bit)<\/p>\n<p>&nbsp;<\/p>\n<h3><strong>INSTRUCTIONS SET OF 8085 MICROPROCESSOR<\/strong><\/h3>\n<p><strong>\u00a0\u00a0 <\/strong>An instruction is a command given to the computer to perform a specified operation on the given data. The instruction set of a microprocessor is the collection of the instructions that the microprocessor is designed to execute. The instruction described here is of Intel 8085. These instructions are of Intel Corporation. They cannot be used by other manufactures. The programmer can write a program in assembly language using these instructions. These instructions have been classified into the following groups:<\/p>\n<ol>\n<li><strong> Data transfer (copy) Instruction<\/strong><\/li>\n<li><strong> Arithmetic Instruction <\/strong><\/li>\n<li><strong> Logical Instruction<\/strong><\/li>\n<li><strong> Branching Instruction and <\/strong><\/li>\n<li><strong> Machine control Instruction<\/strong><\/li>\n<\/ol>\n<p>&nbsp;<\/p>\n<p><strong>1. DATA TRANSFER INSTRUCTION:-<\/strong> Data transfer instructions are the instructions which transfer data in the microprocessor. They are also called copy instructions.<\/p>\n<p>Following is the table showing the list of logical instructions:<\/p>\n<table width=\"100%\">\n<thead>\n<tr>\n<td><strong>OPCODE<\/strong><\/td>\n<td><strong>OPERAND<\/strong><\/td>\n<td><strong>EXPLANATION<\/strong><\/td>\n<td><strong>EXAMPLE<\/strong><\/td>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>MOV<\/td>\n<td>Rd, Rs<\/td>\n<td>Rd = Rs<\/td>\n<td>MOV A, B<\/td>\n<\/tr>\n<tr>\n<td>MOV<\/td>\n<td>Rd, M<\/td>\n<td>Rd = Mc<\/td>\n<td>MOV A, 2050<\/td>\n<\/tr>\n<tr>\n<td>MOV<\/td>\n<td>M, Rs<\/td>\n<td>M = Rs<\/td>\n<td>MOV 2050, A<\/td>\n<\/tr>\n<tr>\n<td>MVI<\/td>\n<td>Rd, 8-bit data<\/td>\n<td>Rd = 8-bit data<\/td>\n<td>MVI A, 50<\/td>\n<\/tr>\n<tr>\n<td>MVI<\/td>\n<td>M, 8-bit data<\/td>\n<td>M = 8-bit data<\/td>\n<td>MVI 2050, 50<\/td>\n<\/tr>\n<tr>\n<td>LDA<\/td>\n<td>16-bit address<\/td>\n<td>A = contents at address<\/td>\n<td>LDA 2050<\/td>\n<\/tr>\n<tr>\n<td>STA<\/td>\n<td>16-bit address<\/td>\n<td>contents at address = A<\/td>\n<td>STA 2050<\/td>\n<\/tr>\n<tr>\n<td>LHLD<\/td>\n<td>16-bit address<\/td>\n<td>directly loads at H &amp; L registers<\/td>\n<td>LHLD 2050<\/td>\n<\/tr>\n<tr>\n<td>SHLD<\/td>\n<td>16-bit address<\/td>\n<td>directly stores from H &amp; L registers<\/td>\n<td>SHLD 2050<\/td>\n<\/tr>\n<tr>\n<td>LXI<\/td>\n<td>r.p., 16-bit data<\/td>\n<td>loads the specified register pair with data<\/td>\n<td>LXI H, 3050<\/td>\n<\/tr>\n<tr>\n<td>LDAX<\/td>\n<td>r.p.<\/td>\n<td>indirectly loads at the accumulator A<\/td>\n<td>LDAX H<\/td>\n<\/tr>\n<tr>\n<td>STAX<\/td>\n<td>16-bit address<\/td>\n<td>indirectly stores from the accumulator A<\/td>\n<td>STAX 2050<\/td>\n<\/tr>\n<tr>\n<td>XCHG<\/td>\n<td>none<\/td>\n<td>exchanges H with D, and L with E<\/td>\n<td>XCHG<\/td>\n<\/tr>\n<tr>\n<td>PUSH<\/td>\n<td>r.p.<\/td>\n<td>pushes r.p. to the stack<\/td>\n<td>PUSH H<\/td>\n<\/tr>\n<tr>\n<td>POP<\/td>\n<td>r.p.<\/td>\n<td>pops the stack to r.p.<\/td>\n<td>POP H<\/td>\n<\/tr>\n<tr>\n<td>IN<\/td>\n<td>8-bit port address<\/td>\n<td>inputs contents of the specified port to A<\/td>\n<td>IN 15<\/td>\n<\/tr>\n<tr>\n<td><\/td>\n<td><\/td>\n<td><\/td>\n<td><\/td>\n<\/tr>\n<tr>\n<td>OUT<\/td>\n<td>8-bit port address<\/td>\n<td>outputs contents of A to the specified port<\/td>\n<td>OUT 15<\/td>\n<\/tr>\n<tr>\n<td><\/td>\n<td><\/td>\n<td><\/td>\n<td><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>In the table,<br \/>\nR stands for register<br \/>\nM stands for memory<br \/>\nr.p. stands for register pair<\/p>\n<p><strong>2. ARITHMETIC INSTRUCTION <\/strong><\/p>\n<p>Arithmetic Instructions are the instructions that perform basic arithmetic operations such as addition, subtraction and a few more. In 8085 microprocessor, the destination operand is generally the accumulator. In 8085 microprocessor, the destination operand is generally the accumulator.<\/p>\n<p>Following is the table showing the list of arithmetic instructions:<\/p>\n<table width=\"100%\">\n<thead>\n<tr>\n<td><strong>OPCODE<\/strong><\/td>\n<td><strong>OPERAND<\/strong><\/td>\n<td><strong>EXPLANATION<\/strong><\/td>\n<td><strong>EXAMPLE<\/strong><\/td>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>ADD<\/td>\n<td>R<\/td>\n<td>A = A + R<\/td>\n<td>ADD B<\/td>\n<\/tr>\n<tr>\n<td>ADD<\/td>\n<td>M<\/td>\n<td>A = A + Mc<\/td>\n<td>ADD 2050<\/td>\n<\/tr>\n<tr>\n<td>ADI<\/td>\n<td>8-bit data<\/td>\n<td>A = A + 8-bit data<\/td>\n<td>ADD 50<\/td>\n<\/tr>\n<tr>\n<td>ADC<\/td>\n<td>R<\/td>\n<td>A = A + R + prev. carry<\/td>\n<td>ADC B<\/td>\n<\/tr>\n<tr>\n<td>ADC<\/td>\n<td>M<\/td>\n<td>A = A + Mc + prev. carry<\/td>\n<td>ADC 2050<\/td>\n<\/tr>\n<tr>\n<td>ACI<\/td>\n<td>8-bit data<\/td>\n<td>A = A + 8-bit data + prev. carry<\/td>\n<td>ACI 50<\/td>\n<\/tr>\n<tr>\n<td>SUB<\/td>\n<td>R<\/td>\n<td>A = A \u2013 R<\/td>\n<td>SUB B<\/td>\n<\/tr>\n<tr>\n<td>SUB<\/td>\n<td>M<\/td>\n<td>A = A \u2013 Mc<\/td>\n<td>SUB 2050<\/td>\n<\/tr>\n<tr>\n<td>SUI<\/td>\n<td>8-bit data<\/td>\n<td>A = A \u2013 8-bit data<\/td>\n<td>SUI 50<\/td>\n<\/tr>\n<tr>\n<td>SBB<\/td>\n<td>R<\/td>\n<td>A = A \u2013 R \u2013 prev. carry<\/td>\n<td>SBB B<\/td>\n<\/tr>\n<tr>\n<td>SBB<\/td>\n<td>M<\/td>\n<td>A = A \u2013 Mc -prev. carry<\/td>\n<td>SBB 2050<\/td>\n<\/tr>\n<tr>\n<td>SBI<\/td>\n<td>8-bit data<\/td>\n<td>A = A \u2013 8-bit data \u2013 prev. carry<\/td>\n<td>SBI 50<\/td>\n<\/tr>\n<tr>\n<td>INR<\/td>\n<td>R<\/td>\n<td>R = R + 1<\/td>\n<td>INR B<\/td>\n<\/tr>\n<tr>\n<td>INR<\/td>\n<td>M<\/td>\n<td>M = Mc + 1<\/td>\n<td>INR 2050<\/td>\n<\/tr>\n<tr>\n<td>INX<\/td>\n<td>r.p.<\/td>\n<td>r.p. = r.p. + 1<\/td>\n<td>INX H<\/td>\n<\/tr>\n<tr>\n<td>DCR<\/td>\n<td>R<\/td>\n<td>R = R \u2013 1<\/td>\n<td>DCR B<\/td>\n<\/tr>\n<tr>\n<td>DCR<\/td>\n<td>M<\/td>\n<td>M = Mc \u2013 1<\/td>\n<td>DCR 2050<\/td>\n<\/tr>\n<tr>\n<td>DCX<\/td>\n<td>r.p.<\/td>\n<td>r.p. = r.p. \u2013 1<\/td>\n<td>DCX H<\/td>\n<\/tr>\n<tr>\n<td>DAD<\/td>\n<td>r.p.<\/td>\n<td>HL = HL + r.p.<\/td>\n<td>DAD H<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>In the table,<br \/>\nR stands for register<br \/>\nM stands for memory<br \/>\nMc stands for memory contents<br \/>\nr.p. stands for register pair<\/p>\n<p><strong>3.LOGICAL INSTRUCTION<\/strong><\/p>\n<p>Logical instructions are the instructions which perform basic logical operations such as AND, OR, etc. In 8085 microprocessor, the destination operand is always the accumulator. Here logical operation works on a bitwise level.<\/p>\n<p>Following is the table showing the list of logical instructions:<\/p>\n<table width=\"100%\">\n<thead>\n<tr>\n<td><strong>OPCODE<\/strong><\/td>\n<td><strong>OPERAND<\/strong><\/td>\n<td><strong>DESTINATION<\/strong><\/td>\n<td><strong>EXAMPLE<\/strong><\/td>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>ANA<\/td>\n<td>R<\/td>\n<td>A = A AND R<\/td>\n<td>ANA B<\/td>\n<\/tr>\n<tr>\n<td>ANA<\/td>\n<td>M<\/td>\n<td>A = A AND Mc<\/td>\n<td>ANA 2050<\/td>\n<\/tr>\n<tr>\n<td>ANI<\/td>\n<td>8-bit data<\/td>\n<td>A = A AND 8-bit data<\/td>\n<td>ANI 50<\/td>\n<\/tr>\n<tr>\n<td>ORA<\/td>\n<td>R<\/td>\n<td>A = A OR R<\/td>\n<td>ORA B<\/td>\n<\/tr>\n<tr>\n<td>ORA<\/td>\n<td>M<\/td>\n<td>A = A OR Mc<\/td>\n<td>ORA 2050<\/td>\n<\/tr>\n<tr>\n<td>ORI<\/td>\n<td>8-bit data<\/td>\n<td>A = A OR 8-bit data<\/td>\n<td>ORI 50<\/td>\n<\/tr>\n<tr>\n<td>XRA<\/td>\n<td>R<\/td>\n<td>A = A XOR R<\/td>\n<td>XRA B<\/td>\n<\/tr>\n<tr>\n<td>XRA<\/td>\n<td>M<\/td>\n<td>A = A XOR Mc<\/td>\n<td>XRA 2050<\/td>\n<\/tr>\n<tr>\n<td>XRI<\/td>\n<td>8-bit data<\/td>\n<td>A = A XOR 8-bit data<\/td>\n<td>XRI 50<\/td>\n<\/tr>\n<tr>\n<td>CMA<\/td>\n<td>none<\/td>\n<td>A = 1\u2019s complement of A<\/td>\n<td>CMA<\/td>\n<\/tr>\n<tr>\n<td>CMP<\/td>\n<td>R<\/td>\n<td>Compares R with A and triggers the flag register<\/td>\n<td>CMP B<\/td>\n<\/tr>\n<tr>\n<td>CMP<\/td>\n<td>M<\/td>\n<td>Compares Mc with A and triggers the flag register<\/td>\n<td>CMP 2050<\/td>\n<\/tr>\n<tr>\n<td>CPI<\/td>\n<td>8-bit data<\/td>\n<td>Compares 8-bit data with A and triggers the flag register<\/td>\n<td>CPI 50<\/td>\n<\/tr>\n<tr>\n<td>RRC<\/td>\n<td>none<\/td>\n<td>Rotate accumulator right without carry<\/td>\n<td>RRC<\/td>\n<\/tr>\n<tr>\n<td>RLC<\/td>\n<td>none<\/td>\n<td>Rotate accumulator left without carrying<\/td>\n<td>RLC<\/td>\n<\/tr>\n<tr>\n<td>RAR<\/td>\n<td>none<\/td>\n<td>Rotate accumulator right with carrying<\/td>\n<td>RAR<\/td>\n<\/tr>\n<tr>\n<td>RAL<\/td>\n<td>none<\/td>\n<td>Rotate accumulator left with a carrying<\/td>\n<td>RAR<\/td>\n<\/tr>\n<tr>\n<td>CMC<\/td>\n<td>none<\/td>\n<td>Compliments the carry flag<\/td>\n<td>CMC<\/td>\n<\/tr>\n<tr>\n<td>STC<\/td>\n<td>none<\/td>\n<td>Sets the carry flag<\/td>\n<td>STC<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>In the table,<br \/>\nR stands for register<br \/>\nM stands for memory<br \/>\nMc stands for memory contents<\/p>\n<p><strong>4. BRANCHING INSTRUCTION <\/strong><\/p>\n<p>Branching instructions refer to the act of switching execution to a different instruction sequence as a result of executing a branch instruction.<\/p>\n<p>The three types of branching instructions are:<\/p>\n<ol>\n<li>Jump (unconditional and conditional)<\/li>\n<li>Call (unconditional and conditional)<\/li>\n<li>Return (unconditional and conditional)<\/li>\n<\/ol>\n<p>&nbsp;<\/p>\n<ol>\n<li><strong>Jump Instructions \u2013<\/strong>The jump instruction transfers the program sequence to the memory address given in the operand based on the specified flag. Jump instructions are 2 types: Unconditional Jump Instructions and Conditional Jump Instructions.<\/li>\n<\/ol>\n<p><strong>(a) Unconditional Jump Instructions:<\/strong>\u00a0Transfers the program sequence to the described memory address.<\/p>\n<table width=\"100%\">\n<thead>\n<tr>\n<td><strong>OPCODE<\/strong><\/td>\n<td><strong>OPERAND<\/strong><\/td>\n<td><strong>EXPLANATION<\/strong><\/td>\n<td><strong>EXAMPLE<\/strong><\/td>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>JMP<\/td>\n<td>address<\/td>\n<td>Jumps to the address<\/td>\n<td>JMP 2050<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><strong>(b) Conditional Jump Instructions:\u00a0<\/strong>Transfers the program sequence to the described memory address only if the condition is satisfied.<\/p>\n<table width=\"100%\">\n<thead>\n<tr>\n<td><strong>OPCODE<\/strong><\/td>\n<td><strong>OPERAND<\/strong><\/td>\n<td><strong>EXPLANATION<\/strong><\/td>\n<td><strong>EXAMPLE<\/strong><\/td>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>JC<\/td>\n<td>address<\/td>\n<td>Jumps to the address if the carry flag is 1<\/td>\n<td>JC 2050<\/td>\n<\/tr>\n<tr>\n<td>JNC<\/td>\n<td>address<\/td>\n<td>Jumps to the address if the carry flag is 0<\/td>\n<td>JNC 2050<\/td>\n<\/tr>\n<tr>\n<td>JZ<\/td>\n<td>address<\/td>\n<td>Jumps to the address if zero flags are 1<\/td>\n<td>JZ 2050<\/td>\n<\/tr>\n<tr>\n<td>JNZ<\/td>\n<td>address<\/td>\n<td>Jumps to the address if zero flags are 0<\/td>\n<td>JNZ 2050<\/td>\n<\/tr>\n<tr>\n<td>JPE<\/td>\n<td>address<\/td>\n<td>Jumps to the address if parity flag is 1<\/td>\n<td>JPE 2050<\/td>\n<\/tr>\n<tr>\n<td>JPO<\/td>\n<td>address<\/td>\n<td>Jumps to the address if parity flag is 0<\/td>\n<td>JPO 2050<\/td>\n<\/tr>\n<tr>\n<td>JM<\/td>\n<td>address<\/td>\n<td>Jumps to the address if sign flag is 1<\/td>\n<td>JM 2050<\/td>\n<\/tr>\n<tr>\n<td>JP<\/td>\n<td>address<\/td>\n<td>Jumps to the address if sign flag 0<\/td>\n<td>JP 2050<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<ol start=\"2\">\n<li><strong>Call Instructions \u2013<\/strong>The call instruction transfers the program sequence to the memory address given in the operand. Before transferring, the address of the next instruction after CALL is pushed onto the stack. Call instructions are 2 types: Unconditional Call Instructions and Conditional Call Instructions.<\/li>\n<\/ol>\n<p><strong>(a) Unconditional Call Instructions:<\/strong>\u00a0It transfers the program sequence to the memory address given in the operand.<\/p>\n<table width=\"100%\">\n<thead>\n<tr>\n<td><strong>OPCODE<\/strong><\/td>\n<td><strong>OPERAND<\/strong><\/td>\n<td><strong>EXPLANATION<\/strong><\/td>\n<td><strong>EXAMPLE<\/strong><\/td>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>CALL<\/td>\n<td>address<\/td>\n<td>Unconditionally calls<\/td>\n<td>CALL 2050<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><strong>(b) Conditional Call Instructions:<\/strong> Only if the condition is satisfied, the instructions execute.<\/p>\n<table width=\"100%\">\n<thead>\n<tr>\n<td><strong>OPCODE<\/strong><\/td>\n<td><strong>OPERAND<\/strong><\/td>\n<td><strong>EXPLANATION<\/strong><\/td>\n<td><strong>EXAMPLE<\/strong><\/td>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>CC<\/td>\n<td>address<\/td>\n<td>Call if the carry flag is 1<\/td>\n<td>CC 2050<\/td>\n<\/tr>\n<tr>\n<td>CNC<\/td>\n<td>address<\/td>\n<td>Call if the carry flag is 0<\/td>\n<td>CNC 2050<\/td>\n<\/tr>\n<tr>\n<td>CZ<\/td>\n<td>address<\/td>\n<td>Calls if zero flags are 1<\/td>\n<td>CZ 2050<\/td>\n<\/tr>\n<tr>\n<td>CNZ<\/td>\n<td>address<\/td>\n<td>Calls if zero flags are 0<\/td>\n<td>CNZ 2050<\/td>\n<\/tr>\n<tr>\n<td>CPE<\/td>\n<td>address<\/td>\n<td>Calls if the carry flag is 1<\/td>\n<td>CPE 2050<\/td>\n<\/tr>\n<tr>\n<td>CPO<\/td>\n<td>address<\/td>\n<td>Calls if the carry flag is 0<\/td>\n<td>CPO 2050<\/td>\n<\/tr>\n<tr>\n<td>CM<\/td>\n<td>address<\/td>\n<td>Calls if sign flag is 1<\/td>\n<td>CM 2050<\/td>\n<\/tr>\n<tr>\n<td>CP<\/td>\n<td>address<\/td>\n<td>Calls if sign flag is 0<\/td>\n<td>CP 2050<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<ol start=\"3\">\n<li><strong>Return Instructions \u2013<\/strong>The return instruction transfers the program sequence from the subroutine to the calling program. Jump instructions are 2 types: Unconditional Jump Instructions and Conditional Jump Instructions.<\/li>\n<\/ol>\n<p><strong>(a) Unconditional Return Instruction:<\/strong>\u00a0The program sequence is transferred unconditionally from the subroutine to the calling program.<\/p>\n<table width=\"100%\">\n<thead>\n<tr>\n<td><strong>OPCODE<\/strong><\/td>\n<td><strong>OPERAND<\/strong><\/td>\n<td><strong>EXPLANATION<\/strong><\/td>\n<td><strong>EXAMPLE<\/strong><\/td>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>RET<\/td>\n<td>none<\/td>\n<td>Return from the subroutine unconditionally<\/td>\n<td>RET<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><strong>(b) Conditional Return Instruction:<\/strong>\u00a0The program sequence is transferred unconditionally from the subroutine to the calling program only is the condition is satisfied.<\/p>\n<table width=\"100%\">\n<thead>\n<tr>\n<td><strong>OPCODE<\/strong><\/td>\n<td><strong>OPERAND<\/strong><\/td>\n<td><strong>EXPLANATION<\/strong><\/td>\n<td><strong>EXAMPLE<\/strong><\/td>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>RC<\/td>\n<td>none<\/td>\n<td>Return from the subroutine if the carry flag is 1<\/td>\n<td>RC<\/td>\n<\/tr>\n<tr>\n<td>RNC<\/td>\n<td>none<\/td>\n<td>Return from the subroutine if the carry flag is 0<\/td>\n<td>RNC<\/td>\n<\/tr>\n<tr>\n<td>RZ<\/td>\n<td>none<\/td>\n<td>Return from the subroutine if zero flags are 1<\/td>\n<td>RZ<\/td>\n<\/tr>\n<tr>\n<td>RNZ<\/td>\n<td>none<\/td>\n<td>Return from the subroutine if zero flags are 0<\/td>\n<td>RNZ<\/td>\n<\/tr>\n<tr>\n<td>RPE<\/td>\n<td>none<\/td>\n<td>Return from the subroutine if parity flag is 1<\/td>\n<td>RPE<\/td>\n<\/tr>\n<tr>\n<td>RPO<\/td>\n<td>none<\/td>\n<td>Return from the subroutine if parity flag is 0<\/td>\n<td>RPO<\/td>\n<\/tr>\n<tr>\n<td>RM<\/td>\n<td>none<\/td>\n<td>Returns from the subroutine if sign flag is 1<\/td>\n<td>RM<\/td>\n<\/tr>\n<tr>\n<td>RP<\/td>\n<td>none<\/td>\n<td>Returns from the subroutine if sign flag is 0<\/td>\n<td>RP<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>You may also like <a href=\"https:\/\/bcisnotes.com\/thirdsemester\/computer-architecture-and-microprocessor\/pin-configuration-of-8085-microprocessor-microprocessor-system-bcis-notes\/\" target=\"_blank\" rel=\"noopener noreferrer\">Pin Configuration of 8085 microprocessor<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<div class=\"mh-excerpt\"><p>ARCHITECTURE BLOCK DIAGRAM\u00a0OF 8085 MICROPROCESSOR 8085 is pronounced as an &#8220;eighty-eighty-five&#8221; microprocessor. It is an 8-bit microprocessor designed by Intel in 1977 using NMOS technology. <a class=\"mh-excerpt-more\" href=\"https:\/\/bcisnotes.com\/thirdsemester\/computer-architecture-and-microprocessor\/intel-8085-microprocessor-architecture-and-programming\/\" title=\"INTEL 8085 MICROPROCESSOR ARCHITECTURE AND PROGRAMMING || Microprocessor|| Bcis Notes\">[&#8230;]<\/a><\/p>\n<\/div>","protected":false},"author":1,"featured_media":1378,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[6],"tags":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v17.1 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>INTEL 8085 MICROPROCESSOR ARCHITECTURE AND PROGRAMM..<\/title>\n<meta name=\"description\" content=\"8085 is pronounced as an &quot;eighty-eighty-five&quot; microprocessor. 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