Data transfer instructions are the instructions which transfer data in the microprocessor. They are also called copy instructions.<\/p>\n
Following is the table showing the list of logical instructions:<\/p>\n
| Upcode Operand<\/td>\n | Description<\/td>\n<\/tr>\n |
| Copy from source to destination MOV<\/p>\n Rd, Rs | \u00a0This instruction copies the contents of the source register into the destination register; the contents of the source register is not altered. If one of the operands is a memory location, its location is specified by the contents of the HL registers. \nExample: MOV B, C or MOV B, M<\/td>\n<\/tr>\n |
| Move immediate 8-bit MVI \nRd, data \nM,data<\/td>\n | The 8-but\u00a0 data is stored in the destination register or memory. If the operand is a memory location, its location is specified by the contents of HL registers. \nExample: MVI B, 20 or MVI M, 59<\/td>\n<\/tr>\n |
| Load accumulator \nLDA 16-bit address<\/td>\n | The contents of a memory location, specified by a \n16-bit address in the operand, are copied to the accumulator. \nThe contents of the source are not altered. \nExample: LDA 4040 or LDA 6000<\/td>\n<\/tr>\n |
| Load accumulator indirect \nLDAX B\/D Reg. pair<\/td>\n | The contents of the designated register pair point to a memory location. This instruction copies the contents of that memory location into the accumulator. The contents of either the register pair or the memory location are not altered. \nExample: LDAX c<\/td>\n<\/tr>\n |
| Load register pair immediate \nLXI Reg. pair, 16-bit data<\/td>\n | The instruction loads 16-bit data in the register pair \ndesignated in the operand. \nExample: LXI H, 4040<\/td>\n<\/tr>\n |
| Load H and L registers direct \nLHLD 16-bit address<\/td>\n | The instruction copies the contents of the memory location pointed out by the 16-bit address into register L and copies the contents of the next memory location into register H. The contents of source memory locations are not altered. \nExample: LHLD 5000<\/td>\n<\/tr>\n |
| Store accumulator direct \nSTA 16-bit address<\/td>\n | The contents of the accumulator are copied into the memory location specified by the operand. This is a 3-byte instruction, the second byte specifies the low-order address and the third byte specifies the high-order address. \nExample: STA 4350 or STA XYZ<\/td>\n<\/tr>\n |
| Store accumulator indirect \nSTAX Reg. pair<\/td>\n | The contents of the accumulator are copied into the memory location specified by the contents of the operand (register pair). The contents of the accumulator are not altered. \nExample: STAX B<\/td>\n<\/tr>\n |
| Store H and L registers direct \nSHLD 16-bit address<\/td>\n | The contents of register L are stored into the memory location specified by the 16-bit address in the operand and the contents of H register are stored into the next memory location by incrementing the operand. The contents of registers HL are not altered. This is a 3-byte instruction, the second byte specifies the low-order address and the third byte specifies the high-order address. \nExample: SHLD 2470<\/td>\n<\/tr>\n |
| Exchange H and L with D and E \nXCHG none<\/td>\n | The contents of register H are exchanged with the contents of register D, and the contents of register L are exchanged with the contents of register E. \nExample: XCHG<\/td>\n<\/tr>\n |
| Copy H and L registers to the stack pointer \nSPHL none<\/td>\n | The instruction loads the contents of the H and L registers into the stack pointer register, the contents of the H register provide the high-order address and the contents of the L register provide the low-order address. The contents of the H and L registers are not altered. \nExample: SPHL<\/td>\n<\/tr>\n |
| Exchange H and L with top of the stack \nXTHL none<\/td>\n | The contents of the L register are exchanged with the stack location pointed out by the contents of the stack pointer register. The contents of the H register are exchanged with the next stack location (SP+1); however, the contents of the stack pointer register are not altered. \nExample: XTHL<\/td>\n<\/tr>\n |
| Push register pair onto the stack \nPUSH Reg. pair<\/td>\n | The contents of the register pair designated in the operand are copied onto the stack in the following sequence. The stack pointer register is decremented and the contents of the high-order register (B, D, H, A) are copied into that location. The stack pointer register is decremented again and the contents of the low-order register (C, E, L, flags) are copied to that location. \nExample: PUSH B or PUSH A<\/td>\n<\/tr>\n |
| Pop off the stack to register pair \nPOP Reg. pair<\/td>\n | The contents of the memory location pointed out by the stack pointer register are copied to the low-order register (C, E, L, status flags) of the operand. The stack pointer is incremented by 1 and the contents of that memory location are copied to the high-order register (B, D, H, A) of the operand. The stack pointer register is again incremented by 1. \nExample: POP H or POP A<\/td>\n<\/tr>\n |
| Output data from the accumulator to a port with 8-bit address \nOUT 8-bit port address<\/td>\n | The contents of the accumulator are copied into the I\/O port specified by the operand. \nExample: OUT 87<\/td>\n<\/tr>\n |
| Input data to accumulator from a port with 8-bit address \nIN 8-bit port address<\/td>\n | The contents of the input port designated in the operand are read and loaded into the accumulator. \nExample: IN 82<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n you may also like\u00a0Timing Diagram<\/a><\/p>\n","protected":false},"excerpt":{"rendered":" |