{"id":391,"date":"2019-08-06T14:17:31","date_gmt":"2019-08-06T08:32:31","guid":{"rendered":"https:\/\/bcisnotes.com\/secondsemester\/?p=391"},"modified":"2021-04-05T13:42:04","modified_gmt":"2021-04-05T07:57:04","slug":"adders-and-subtractors","status":"publish","type":"post","link":"https:\/\/bcisnotes.com\/secondsemester\/digital-systems\/adders-and-subtractors\/","title":{"rendered":"Adders and Subtractors  || Combinational Logic || Bcis Notes"},"content":{"rendered":"<h2>Adders and Subtractors<\/h2>\n<p>Adders and Subtractors are described below:-<\/p>\n<h2>Adders<\/h2>\n<p style=\"text-align: left;\">The most common operation performed is a digital computer is arithmetic operations. Generally,\u00a0 Adders are classified into two types they are:-<\/p>\n<ul>\n<li>Half adder<\/li>\n<li>Full adder<\/li>\n<\/ul>\n<p><strong>a. Half Adder<\/strong><br \/>\nHalf adder is a combinational circuit which is used to add two: one bit&#8217;s of a number, A and B, the output variable produce the sum and carry which can be represented by &#8220;S&#8221; and &#8220;c&#8221;.<\/p>\n<p>&nbsp;<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-1394 size-medium\" src=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/half-coder-300x246.jpg\" alt=\"\" width=\"300\" height=\"246\" srcset=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/half-coder-300x246.jpg 300w, https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/half-coder.jpg 728w\" sizes=\"(max-width: 300px) 100vw, 300px\" \/><\/p>\n<p style=\"text-align: center;\"><strong><em>Fig: Truth Table<\/em><\/strong><\/p>\n<p style=\"text-align: center;\"><img loading=\"lazy\" decoding=\"async\" class=\"alignnone wp-image-1395 size-mh-magazine-lite-content\" src=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/kmap-for-sum-carry-half-adder-678x299.jpg\" alt=\"\" width=\"678\" height=\"299\" \/><\/p>\n<p style=\"text-align: center;\"><em><strong>Fig: K-Map of carry and sum<\/strong><\/em><\/p>\n<p style=\"text-align: center;\"><img loading=\"lazy\" decoding=\"async\" class=\"alignnone wp-image-1396 size-medium\" src=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/1200px-Half_Adder.svg_-300x167.png\" alt=\"\" width=\"300\" height=\"167\" srcset=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/1200px-Half_Adder.svg_-300x167.png 300w, https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/1200px-Half_Adder.svg_-1024x569.png 1024w, https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/1200px-Half_Adder.svg_-768x427.png 768w, https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/1200px-Half_Adder.svg_.png 1200w\" sizes=\"(max-width: 300px) 100vw, 300px\" \/><\/p>\n<p style=\"text-align: center;\"><em><strong>Fig: Logical Diagram of carry and sum<\/strong><\/em><\/p>\n<p><strong>b. Full Adder<\/strong><\/p>\n<p>This adder is difficult to implement than a half-adder. The difference between a half-adder and a full-adder is that the full-adder has three inputs and two outputs, whereas half adder has only two inputs and two outputs. The first two inputs are A and B and the third input is an input carry as C-IN. When a full-adder logic is designed, you string eight of them together to create a byte-wide adder and cascade the carry bit from one adder to the next.<\/p>\n<p style=\"text-align: center;\"><img loading=\"lazy\" decoding=\"async\" class=\"alignnone wp-image-1413 size-medium\" src=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/full-adder-truth-tble-300x275.jpg\" alt=\"\" width=\"300\" height=\"275\" srcset=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/full-adder-truth-tble-300x275.jpg 300w, https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/full-adder-truth-tble-768x703.jpg 768w, https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/full-adder-truth-tble.jpg 1000w\" sizes=\"(max-width: 300px) 100vw, 300px\" \/><\/p>\n<p style=\"text-align: center;\"><em><strong>Fig: Truth Table<\/strong><\/em><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: center;\"><em><strong>Fig: K-Map of Full adder<\/strong><\/em><\/p>\n<p>&nbsp;<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-1415 size-medium aligncenter\" src=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/ka-map--300x150.jpg\" alt=\"\" width=\"300\" height=\"150\" srcset=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/ka-map--300x150.jpg 300w, https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/ka-map--768x383.jpg 768w, https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/ka-map-.jpg 1000w\" sizes=\"(max-width: 300px) 100vw, 300px\" \/><\/p>\n<p style=\"text-align: center;\"><em><strong>Fig: Logic circuit of full adder<\/strong><\/em><\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-1416 size-medium aligncenter\" src=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/circuit-diagram-300x185.jpg\" alt=\"\" width=\"300\" height=\"185\" srcset=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/circuit-diagram-300x185.jpg 300w, https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/circuit-diagram-768x473.jpg 768w, https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/circuit-diagram.jpg 1000w\" sizes=\"(max-width: 300px) 100vw, 300px\" \/><\/p>\n<h2>Subtractors<\/h2>\n<p>The subtraction of two binary numbers may be accomplished by taking the complement of the subtrahend and adding it to the minuend. By this method, the subtraction operation becomes an addition operation requiring the full-adders for its machine implementation, it is possible to implement subtraction with the logic circuit in a direct manner, as done with the paper and pencil. By this method, each subtrahend bit of the number is subtracted from its corresponding significant minuend bit to form a difference bit.<\/p>\n<p>Subtractors are classified into two types they are:-<\/p>\n<p>a. Half subtractor<br \/>\nb. Full subtractor<\/p>\n<p><strong>a. Half subtractor<br \/>\n<\/strong><\/p>\n<p>A half-subtractor is a combinational circuit that subtracts two bits and produces their difference bit. Denoting minuend bit by A and the subtrahend bit by B. To perform A &#8211; B, we have to check the relative magnitudes of A and B:<br \/>\ni.\u00a0 If A\u2265 B, we have three possibilities: 0 &#8211; 0 = 0, 1 &#8211; 0 = 1, and 1 &#8211; 1 = 0.<br \/>\nii. If A &lt; B, we have 0 &#8211; 1, and it is necessary to borrow a 1 from the next higher stage.<br \/>\nThe half-subtractor needs two outputs, difference (D) and borrow (B).<\/p>\n<p>&nbsp;<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-406 size-full\" src=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/Half-Subtractor.jpg\" alt=\"Adders and Subtractors || Combinational Logic || Bcis Notes\" width=\"560\" height=\"378\" srcset=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/Half-Subtractor.jpg 560w, https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/Half-Subtractor-300x203.jpg 300w\" sizes=\"(max-width: 560px) 100vw, 560px\" \/><\/p>\n<p>&nbsp;<\/p>\n<p><strong>b. Full subtractor<\/strong><\/p>\n<p>A full subtractor is a combinational circuit that performs subtraction of two bits, one is minuend and other is subtrahend, taking into account borrow of the previous adjacent lower minuend bit. This circuit has three inputs and two outputs. The three inputs A, B and Bin, denote the minuend, subtrahend, and previous borrow, respectively. The two outputs, D and Bout represent the difference and output borrow, respectively.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-408 size-full\" src=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/full-subtractor-truth-table.jpg\" alt=\" Adders and Subtractors || Combinational Logic || Bcis Notes\" width=\"300\" height=\"212\" \/><\/p>\n<p style=\"text-align: center;\"><em><strong>Fig: truth table<\/strong><\/em><\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-409 size-full\" src=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/full-subtractor-Kmap.jpg\" alt=\"Adders and Subtractors || Combinational Logic || Bcis Notes\" width=\"300\" height=\"237\" \/><\/p>\n<p style=\"text-align: center;\"><em><strong>Fig: k-map of difference<\/strong><\/em><\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-410 size-full\" src=\"https:\/\/bcisnotes.com\/secondsemester\/wp-content\/uploads\/2019\/08\/full-subtractor-Kmap2.jpg\" alt=\"Adders and Subtractors || Combinational Logic || Bcis Notes\" width=\"300\" height=\"235\" \/><\/p>\n<p style=\"text-align: center;\"><em><strong>Fig: K-map of borrow<\/strong><\/em><\/p>\n<p>You may also like the\u00a0<a href=\"https:\/\/bcisnotes.com\/secondsemester\/combinational-circuit\/\">Combinational Circuit<\/a><\/p>\n<div class=\"yfgrr69de23dc1dbdc\" ><div id=\"amzn-assoc-ad-668fe681-bdc6-49ee-a9f9-a4c2f5be29a0\"><\/div><script async src=\"\/\/z-na.amazon-adsystem.com\/widgets\/onejs?MarketPlace=US&adInstanceId=668fe681-bdc6-49ee-a9f9-a4c2f5be29a0\"><\/script><\/div><style type=\"text\/css\">\r\n@media screen and (min-width: 1201px) {\r\n.yfgrr69de23dc1dbdc {\r\ndisplay: block;\r\n}\r\n}\r\n@media screen and (min-width: 993px) and (max-width: 1200px) {\r\n.yfgrr69de23dc1dbdc {\r\ndisplay: block;\r\n}\r\n}\r\n@media screen and (min-width: 769px) and (max-width: 992px) {\r\n.yfgrr69de23dc1dbdc {\r\ndisplay: block;\r\n}\r\n}\r\n@media screen and (min-width: 768px) and (max-width: 768px) {\r\n.yfgrr69de23dc1dbdc {\r\ndisplay: block;\r\n}\r\n}\r\n@media screen and (max-width: 767px) {\r\n.yfgrr69de23dc1dbdc {\r\ndisplay: block;\r\n}\r\n}\r\n<\/style>\r\n","protected":false},"excerpt":{"rendered":"<div class=\"mh-excerpt\"><p>Adders and Subtractors Adders and Subtractors are described below:- Adders The most common operation performed is a digital computer is arithmetic operations. Generally,\u00a0 Adders are <a class=\"mh-excerpt-more\" href=\"https:\/\/bcisnotes.com\/secondsemester\/digital-systems\/adders-and-subtractors\/\" title=\"Adders and Subtractors  || Combinational Logic || Bcis Notes\">[&#8230;]<\/a><\/p>\n<\/div>","protected":false},"author":6,"featured_media":799,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[3],"tags":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v23.5 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Adders and Subtractors || Combinational Logic || Bcis Notes<\/title>\n<meta name=\"description\" content=\"Adders and Subtractors where adder is the most common operation performed is a digital computer is arithmetic operations subtraction.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" 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